SEVER, R. 2004. A High Speed ASIC Implementation of the Rijndael Algorithm. Intenational Symposium on Circuits and Systems 2004 , (Vancouver, Canada), 541-544.

SEVER, R., (2004). A High Speed ASIC Implementation of the Rijndael Algorithm . Intenational Symposium on Circuits and Systems 2004 (pp.541-544). Vancouver, Canada

SEVER, REFİK. "A High Speed ASIC Implementation of the Rijndael Algorithm," Intenational Symposium on Circuits and Systems 2004, Vancouver, Canada, 2004

SEVER, REFİK. "A High Speed ASIC Implementation of the Rijndael Algorithm." Intenational Symposium on Circuits and Systems 2004 , Vancouver, Canada, pp.541-544, 2004

SEVER, R. (2004) . "A High Speed ASIC Implementation of the Rijndael Algorithm." Intenational Symposium on Circuits and Systems 2004 , Vancouver, Canada, pp.541-544.

@conferencepaper{conferencepaper, author={REFİK SEVER}, title={A High Speed ASIC Implementation of the Rijndael Algorithm}, congress name={Intenational Symposium on Circuits and Systems 2004}, city={Vancouver}, country={Canada}, year={2004}, pages={541-544} }